1. Field of the Invention
Example embodiments of the present invention relate to an array substrate, a display apparatus having the array substrate, and a method of manufacturing the array substrate. More particularly, example embodiments of the present invention relate to an array substrate having a chip-on glass (COG) type mount, a display apparatus having the array substrate, and a method of manufacturing the array substrate.
2. Discussion of the Background
In general, a display apparatus includes a display panel including an array substrate and an opposing substrate facing the array substrate. The display panel includes a display area to display an image, and a peripheral area surrounding the display area. In the display area, a switching element and a pixel electrode are formed. In the peripheral area, data and gate drivers to drive the switching element and the pixel electrode, and an electrostatic prevention diode or an electrostatic prevention transistor disposed between the switching element and the data and gate drivers, are formed.
The data and gate drivers are mounted in the peripheral area of the array substrate as a chip-on-film (COF) type mount or a chip-on-glass (COG) type mount. When the data and gate drivers are mounted in the peripheral area of the array substrate as a COG type mount, a driver driving line as well as a chip is directly mounted on the array substrate. The driver driving line may include a power source line, a data driving line and a gate driving line, etc.
Particularly, when the power source line is disposed on the array substrate, a voltage drop is relatively high compared to a case where the power source line is disposed on a tape. To solve a higher voltage drop problem of the power source line disposed on the array substrate, a width of the power source line may be increased to decrease the voltage drop. In addition, the power source line may be disposed between input and output bumps of the chip, so that space on the display panel may be used efficiently.
However, when the power source line having a wide width is disposed between the input and output bumps of the chip, a static electricity may easily flow through the power source line. The static electricity provided from the power source line may flow into data and gate lines through data and gate pads respectively, so that an electrostatic diode of the peripheral area may be damaged. In addition, a damage of the electrostatic diode may induce a damage of a line of the display area.
The above information disclosed in this Background section is only for enhancement of understanding of the background of the invention and therefore it may contain information that does not form any part of the prior art.